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FUJITSU PLL FAQ
1. What will cause tolerance on lock frequency?
| Answer: |
1. Oscillation or crytal
applying to the PLL, fine tune the oscillation by external capacitor |
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2. Parameter using. Refer to
the fomula, fvco = (NM+A) x fosc /R |
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where, |
N = divide ratio for input frequency |
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M = divide ratio for the prescalar |
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A = variable |
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fosc = reference oscillator frequency |
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R = divide ratio for reference frequency |
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- Since different combination on this five
parameters will narrow the tolerance for target frequency, so please try
to use more combination.
- For different PLL, it may have different best working frequency for
reference counter, please do select the best range to do.
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3. Gain controlling, use
suitable parameter to make 5KHz < fosc/R < 25KHz, which fosc
is the frequency input to the PLL and R is the divided ratio in
reference counter. |
2. PLL does not lock in always?
| Answer: |
- Special care on the
voltage applying the the charge pump or comparator, also check the loading for
the lock detect output. Sometimes, it may be overload. Buffering may need in this case.
- Check the input frequency.
- Check supply voltage on PLL
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3. How to select Fujitsu PLL and calculate the low pass
filter?
4. Is there any different between MB15E03/07 and
MB15E03SL /07SL ?
| Answer: |
SL suffix is for low power version, the command bit is 19 bit for
programmable reference counter while in non-SL version, the programmable reference counter is 18 bit.
The extra bit is for controlling the output current for charge pump
Customer has advantage to select the output current for charge pump so that they
can have larger power saving.
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| Note: For most control program is still working because the 18bit data
is same for both non-SL and SL version. |
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